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general description the MAX17031 is a dual quick-pwm? step-down power-supply (smps) controller with synchronous recti- fication, intended for main 5v/3.3v power generation in battery-powered systems. low-side mosfet sensing provides a simple low-cost, highly efficient current sense for valley current-limit protection. combined with the output overvoltage and undervoltage protection fea- tures, this current limit ensures robust output supplies. the 5v/3.3v smps outputs can save power by operat- ing in pulse-skipping mode or in ultrasonic mode to avoid audible noise. ultrasonic mode forces the con- troller to maintain switching frequencies greater than 20khz at light loads. the skip input also has an accu- rate logic threshold, allowing it to be used as a sec- ondary feedback input to refresh an external charge pump or secondary winding without overcharging the output voltages. an internal 100ma linear regulator generates the 5v bias needed for power-up or other low-power always- on suspend supplies. an internal bypass circuitry allows automatic bypassing of the linear regulator when the 5v smps is active. the device includes independent shutdown controls with well-defined logic thresholds to simplify power-up and power-down sequencing. to prevent current surges at startup, the internal voltage target is slowly ramped up from zero to the final target over a 1ms peri- od. to prevent the output from ringing below ground in shutdown, the internal voltage target is ramped down from its previous value to zero over a 1ms period. a combined power-good (pgood) output simplifies the interface with external controllers. the MAX17031 is available in a 24-pin thin qfn (4mm x 4mm) package. applications notebook computers ultra-mobile pc main system supply (5v and 3.3v supplies) 2 to 4 li+ cells battery-powered devices telecommunication features dual quick-pwm preset 5v and 3.3v outputs internal 100ma, 5v linear regulator internal out1 ldo5 bypass switch secondary feedback (skip input) maintains charge pump 3.3v, 5ma real-time clock (rtc) power (always on) 2v ?% 50? reference 6v to 24v input range pulse-skipping/forced-pwm/ultrasonic mode control independent smps and ldo5 enable controls combined smps pgood outputs minimal component count MAX17031 dual quick-pwm step-down controller with low- power ldo and rtc regulator for main supplies ________________________________________________________________ maxim integrated products 1 23 *exposed pad. *ep 24 22 21 8 7 9 onldo rtc in ldo5 10 ref dl2 v dd dl1 bst2 bst1 12 skip 456 17 18 16 14 13 out2 ilim2 on1 pgood ilim1 out1 MAX17031 v cc gnd 3 15 on2 20 11 dh1 dh2 19 12 lx1 lx2 thin qfn 4mm 4mm top view + pin configuration ordering information 19-4305; rev 0; 10/08 for pricing, delivery, and ordering information, please contact maxim direct at 1-888-629-4642, or visit maxim? website at www.maxim-ic.com. evaluation kit available + denotes a lead-free/rohs-compliant package. * ep = exposed pad. part temp range pin-package MAX17031etg+ -40 c to +85 c 24 tqfn-ep* quick-pwm is a trademark of maxim integrated products, inc.
MAX17031 dual quick-pwm step-down controller with low- power ldo and rtc regulator for main supplies 2 _______________________________________________________________________________________ absolute maximum ratings electrical characteristics (circuit of figure 2, no load on ldo5, rtc, out1, out2, and ref, v in = 12v, v dd = v cc = v skip = 5v, onldo = rtc, on1 = on2 = v cc , t a = 0? to +85? , unless otherwise noted. typical values are at t a = +25c.) stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. these are stress rating s only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specificatio ns is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. in to gnd ...............................................................-0.3v to +28v v dd , v cc to gnd .....................................................-0.3v to +6v rtc, ldo5, onldo to gnd ...................................-0.3v to +6v out2 to gnd ...........................................................-0.3v to +6v on1, on2, pgood to gnd.....................................-0.3v to +6v out1 to gnd..........................................-0.3v to (v ldo5 + 0.3v) skip to gnd...............................................-0.3v to (v cc + 0.3v) ref, ilim1, ilim2 to gnd ..........................-0.3v to (v cc + 0.3v) dl_ to gnd ................................................-0.3v to (v dd + 0.3v) bst_ to gnd ..........................................................-0.3v to +36v bst_ to v dd ............................................................-0.3v to +30v dh1 to lx1 ..............................................-0.3v to (v bst1 + 0.3v) bst1 to lx1..............................................................-0.3v to +6v dh2 to lx2 ..............................................-0.3v to (v bst2 + 0.3v) bst2 to lx2..............................................................-0.3v to +6v ldo5, rtc, ref short circuit to gnd.......................momentary rtc current continuous.....................................................+5ma ldo5 current (internal regulator) continuous ..............+100ma ldo5 current (switched over) continuous ...................+200ma continuous power dissipation (t a = +70c) 24-pin, 4mm x 4mm thin qfn (t2444-3) (derate 27.8mw/c above +70c) .................................2.22w operating temperature range ...........................-40c to +85c junction temperature ......................................................+150c storage temperature range .............................-65c to +150c lead temperature (soldering, 10s) .................................+300c parameter symbol conditions min typ max units input supplies in input voltage range ldo5 in regulation 6 24 v in standby supply current v in = 6v to 24v, on1 = on2 = gnd, onldo = rtc 85 175 a in shutdown supply current v in = 4.5v to 24v, on1 = on2 = onldo = gnd 40 70 a in supply current i in on1 = on2 = v cc , v skip = v cc ; v out1 = 5.3v, v out2 = 3.5v 0.1 0.2 ma v cc bias supply current i vcc on1 = on2 = v cc , v skip = v cc ; v out1 = 5.3v, v out2 = 3.5v 0.7 1.5 ma pwm controllers out1 output-voltage accuracy v out1 v skip = 1.8v 4.95 5.00 5.05 v out2 output-voltage accuracy v out2 v skip = 1.8v 3.267 3.30 3.333 v either smps, v skip = 1.8v, i load = 0 to 5a -0.1 either smps, v skip = gnd, i load = 0 to 5a -1.7 load regulation error either smps, v skip = v cc , i load = 0 to 5a -1.5 % line regulation error either smps, in = 6v to 28v 0.005 %/v dh1 on-time t on1 v out1 = 5.0v (note 1) 895 1052 1209 ns dh2 on-time t on2 v out2 = 3.3v (note 1) 833 925 1017 ns minimum off-time t off(min) (note 1) 300 400 ns soft-start slew rate t ss rising/falling edge on on1 or on2 1 ms ultrasonic operating frequency f sw(usonic) v skip = gnd 20 34 khz note: measurements are valid using a 20mhz bandwidth limit.
MAX17031 dual quick-pwm step-down controller with low- power ldo and rtc regulator for main supplies _______________________________________________________________________________________ 3 parameter symbol conditions min typ max units linear regulator (ldo5) ldo5 output-voltage accuracy v ldo5 v in = 6v to 24v, on1 = gnd, 0 < i ldo5 < 100ma 4.90 5.0 5.10 v ldo5 short-circuit current ldo5 = gnd 100 260 ma falling edge of out1 -11.0 -8.8 -6.0 ldo5 regulation reduction/ bootstrap switchover threshold rising edge of out1 -7.0 % ldo5 bootstrap switch resistance ldo5 to out1, v out1 = 5v (note 3) 1.9 4.5 falling edge of v cc , pwm disabled below this threshold 3.8 4.0 4.3 v cc undervoltage lockout threshold rising edge of v cc 4.2 v thermal-shutdown threshold t shdn hysteresis = 10 c 160 c 3.3v always-on linear regulator (rtc) on1 = on2 = gnd, v in = 6v to 24v, 0 < i rtc < 5ma 3.23 3.33 3.43 rtc output-voltage accuracy v rtc on1 = on2 = onldo = gnd, v in = 6v to 24v, 0 < i rtc < 5ma 3.19 3.47 v rtc short-circuit current rtc = gnd 5 22 ma reference (ref) reference voltage v ref v cc = 4.5v to 5.5v, i ref = 0 1.980 2.00 2.020 v reference load regulation error v ref i ref = -20a to +50a -10 +10 mv ref lockout voltage v ref(uvlo) rising edge, 350mv (typ) hysteresis 1.95 v out1 fault detection out1 overvoltage and pgood trip threshold with respect to error comparator threshold 10 13 16 % out1 overvoltage fault propagation dela y t ovp out1 forced 50mv above trip threshold 10 s out1 undervoltage protection trip threshold with respect to error comparator threshold 65 70 75 % out1 output undervoltage fault propagation delay t uvp 10 s out2 fault detection out2 overvoltage and pgood trip threshold with respect to error comparator threshold 10 13 16 % out2 overvoltage fault propagation dela y t ovp out2 forced 50mv above trip threshold 10 s out2 undervoltage protection trip threshold with respect to error comparator threshold 65 70 75 % out2 output undervoltage fault propagation dela y t uvp 10 s electrical characteristics (continued) (circuit of figure 2, no load on ldo5, rtc, out1, out2, and ref, v in = 12v, v dd = v cc = v skip = 5v, onldo = rtc, on1 = on2 = v cc , t a = 0? to +85? , unless otherwise noted. typical values are at t a = +25c.)
MAX17031 dual quick-pwm step-down controller with low- power ldo and rtc regulator for main supplies 4 _______________________________________________________________________________________ electrical characteristics (continued) (circuit of figure 2, no load on ldo5, rtc, out1, out2, and ref, v in = 12v, v dd = v cc = v skip = 5v, onldo = rtc, on1 = on2 = v cc , t a = 0? to +85? , unless otherwise noted. typical values are at t a = +25c.) parameter symbol conditions min typ max units po wer-good pgood lower trip threshold with respect to either error comparator threshold, falling edge, hysteresis = 1% -16 -13 -10 % pgood propagation de la y t pgood out1 or out2 forced 50mv beyond pgood trip threshold, falling edge 10 s pgood output low voltage on1 or on2 = gnd (pgood low impedance), i sink = 4ma 0.3 v pgood leakage current i pgood out1 and out2 in regulation (pgood high impedance), pgood forced to 5.5v, t a = +25c 1 a current limit ilim_ adjustment range 0.2 2 v ilim_ current 5 a r ilim _ = 100k (v ilim _ = 500mv) 44 50 56 r ilim _ = 200k (v ilim _ = 1.00v) 90 100 110 valley current-limit threshold (adjustable) v lim _ (val) v agnd - v lx _ r ilim _ = 400k (v ilim _ = 2.00v) 180 200 220 mv current-limit threshold (negative) v neg with respect to valley current-limit threshold, v skip = v ref -120 % ultrasonic current-limit threshold v neg(us) v out2 = 3.5v, v out1 = 5.3v 20 mv current-limit threshold (zero crossing) v zx v agnd - v lx _, v skip = v cc or gnd 1.5 mv gate drivers dh_ gate-driver on-resistance r dh bst1 - lx1 and bst2 - lx2 forced to 5v 1.5 3.5 dl1, dl2; high state 1.4 4.5 dl_ gate-driver on-resistance r dl dl1, dl2; low state 0.5 1.5 dh_ gate-driver source/sink current i dh dh1, dh2 forced to 2.5v, bst1 - lx1 and bst2 - lx2 forced to 5v 2 a dl_ gate-driver source current i dl (source) dl1, dl2 forced to 2.5v 1.7 a dl_ gate-driver sink current i dl (sink) dl1, dl2 forced to 2.5v 3.3 a dl1, dl2 rising (note 4) 30 dead time t dead dh1, dh2 rising (note 4) 35 ns internal bst_ switch on-resistance r bst i bst _ = 10ma, v dd = 5v 5.5 bst_leakage current v bst _ = 26v, t a = +25c; out1 and out2 above regulation threshold 0.1 5 a
MAX17031 _______________________________________________________________________________________ 5 dual quick-pwm step-down controller with low- power ldo and rtc regulator for main supplies electrical characteristics (continued) (circuit of figure 2, no load on ldo5, rtc, out1, out2, and ref, v in = 12v, v dd = v cc = v skip = 5v, onldo = rtc, on1 = on2 = v cc , t a = 0? to +85? , unless otherwise noted. typical values are at t a = +25c.) parameter symbol conditions min typ max units inputs and outputs upper skip/pwm threshold falling edge, 33mv hysteresis 1.94 2.0 2.06 skip input thresholds lower pwm/ultrasonic threshold 0.4 1.6 v skip leakage current v skip = 0 or 5v, t a = +25c -1 +1 a high (smps on) 2.4 on_ input-logic levels onldo, on1, on2 low (smps off) 0.8 v on_ leakage current v on1 = v on2 = v onldo = 0 or 5v, t a = +25c -2 +2 a v out1 = 5.3v 15 65 out_ leakage current v on1 = v on2 = v cc v out2 = 3.5v 5 30 a electrical characteristics (circuit of figure 2, no load on ldo5, rtc, out1, out2, and ref, v in = 12v, v dd = v cc = v skip = 5v, onldo = rtc, on1 = on2 = v cc , t a = -40? to +85? , unless otherwise noted. typical values are at t a = +25 c.) parameter symbol conditions min typ max units input supplies in input voltage range ldo5 in regulation 6 24 v in standby supply current v in = 6v to 24v, on1 = on2 = gnd, onldo = rtc 200 a in shutdown supply current v in = 4.5v to 24v, on1 = on2 = onldo = gnd 70 a in supply current i in on1 = on2 = v cc , v skip = v cc , v out1 = 5.3v, v out2 = 3.5v 0.2 ma v cc bias supply current i vcc on1 = on2 = v cc , v skip = v cc , v out1 = 5.3v, v out2 = 3.5v 1.5 ma pwm controllers out1 output-voltage accuracy v out1 v skip = 1.8v 4.90 5.10 v out2 output-voltage accuracy v out2 v skip = 1.8v 3.234 3.366 v dh1 on-time t on1 v out1 = 5.0v (note 1) 895 1209 ns dh2 on-time t on2 v out2 = 3.3v (note 1) 833 1017 ns minimum off-time t off(min) (note 1) 400 ns ultrasonic operating frequency f sw(usonic) v skip = gnd 18 khz
MAX17031 dual quick-pwm step-down controller with low- power ldo and rtc regulator for main supplies 6 _______________________________________________________________________________________ electrical characteristics (continued) (circuit of figure 2, no load on ldo5, rtc, out1, out2, and ref, v in = 12v, v dd = v cc = v skip = 5v, onldo = rtc, on1 = on2 = v cc , t a = -40? to +85? , unless otherwise noted. typical values are at t a = +25 c.) parameter symbol conditions min typ max units linear regulator (ldo5) ldo5 output-voltage accuracy v ldo5 v in = 6v to 24v, on1 = gnd; 0ma < i ldo5 < 100ma 4.85 5.15 v ldo5 short-circuit current ldo5 = gnd 260 ma ldo5 regulation reduction/ bootstrap switchover threshold falling edge of out1 -12.0 -5.0 % ldo5 bootstrap switch resistance ldo5 to out1, v out1 = 5v (note 3) 4.5 v cc undervoltage lockout threshold falling edge of v cc , pwm disabled below this threshold 3.8 4.3 v 3.3v always-on linear regulator (rtc) on1 = on2 = gnd, v in = 6v to 24v, 0 < i rtc < 5ma 3.18 3.45 rtc output-voltage accuracy v rtc on1 = on2 = onldo = gnd, v in = 6v to 24v, 0 < i rtc < 5ma 3.16 3.50 v rtc short-circuit current rtc = gnd 5 22 ma reference (ref) reference voltage v ref v cc = 4.5v to 5.5v, i ref = 0 1.975 2.025 v reference load regulation error v ref i ref = -20a to +50a -10 +10 mv out1 fault detection out1 overvoltage and pgood trip threshold with respect to error comparator threshold 10 16 % out1 undervoltage protection trip threshold with respect to error comparator threshold 63 77 % out2 fault detection out2 overvoltage and pgood trip threshold with respect to error comparator threshold 10 16 % out2 undervoltage protection trip threshold with respect to error comparator threshold 63 77 % po wer-good pgood lower trip threshold with respect to either error comparator threshold, falling edge, hysteresis = 1% -16 -10 % pgood output low voltage on1 or on2 = gnd (pgood low impedance), i sink = 4ma 0.3 v
MAX17031 dual quick-pwm step-down controller with low- power ldo and rtc regulator for main supplies _______________________________________________________________________________________ 7 electrical characteristics (continued) (circuit of figure 2, no load on ldo5, rtc, out1, out2, and ref, v in = 12v, v dd = v cc = v skip = 5v, onldo = rtc, on1 = on2 = v cc , t a = -40? to +85? , unless otherwise noted. typical values are at t a = +25 c.) parameter symbol conditions min typ max units current limit ilim_ adjustment range 0.2 2 v r ilim _ = 100k (v ilim _ = 500mv) 40 60 r ilim _ = 200k (v ilim _ = 1.00v) 85 115 valley current-limit threshold (adjustable) v lim _ (val) v agnd - v lx _ r ilim _ = 400k (v ilim _ = 2.00v) 164 236 mv gate drivers dh_ gate-driver on-resistance r dh bst1 - lx1 and bst2 - lx2 forced to 5v 3.5 dl1, dl2; high state 4.5 dl_ gate-driver on-resistance r dl dl1, dl2; low state 1.5 inputs and outputs upper skip/pwm threshold falling edge, 33mv hysteresis 1.94 2.06 skip input thresholds lower pwm/ultrasonic threshold 0.4 1.6 v high (smps on) 2.4 on_ input-logic levels onldo, on1, on2 low (smps off) 0.8 v note 1: on-time and off-time specifications are measured from 50% point to 50% point at the dh pin with lx = gnd, v bst = 5v, and a 500pf capacitor from dh to lx to simulate external mosfet gate capacitance. actual in-circuit times might be different due to mosfet switching speeds. note 2: specifications to t a = -40c are guaranteed by design and not production tested. note 3: specification increased by 1 ? to account for test measurement error. note 4: production tested for functionality only.
MAX17031 dual quick-pwm step-down controller with low- power ldo and rtc regulator for main supplies 8 _______________________________________________________________________________________ 5v output efficiency vs. load current MAX17031 toc01 load current (a) efficiency (%) 1 0.1 55 60 65 70 75 80 85 90 95 100 50 0.01 10 skip mode 12v 20v 7v pwm mode 5v output efficiency vs. load current MAX17031 toc02 load current (a) efficiency (%) 1 0.1 55 60 65 70 75 80 85 90 95 100 50 0.01 10 skip mode 12v input ultrasonic mode pwm mode 3.3v output efficiency vs. load current MAX17031 toc03 load current (a) efficiency (%) 1 0.1 55 60 65 70 75 80 85 90 95 100 50 0.01 10 skip mode 12v 20v 7v pwm mode 3.3v output efficiency vs. load current MAX17031 toc04 load current (a) efficiency (%) 1 0.1 55 60 65 70 75 80 85 90 95 100 50 0.01 10 skip mode 12v input ultrasonic mode pwm mode smps output-voltage deviation vs. load current MAX17031 toc05 load current (a) output-voltage deviation (%) 1 0.1 -2 -1 0 1 2 3 -3 0.01 10 skip mode 12v input low-noise ultrasonic mode pwm mode switching frequency vs. load current MAX17031 toc06 load current (a) switching frequency (khz) 1 0.1 10 100 1000 1 0.01 10 skip mode 12v input low-noise ultrasonic mode pwm mode 5v ldo output voltage vs. load current MAX17031 toc07 load current (ma) output voltage (v) 100 120 140 20 40 60 80 4.9 4.8 5.0 5.1 5.2 4.7 0160 3.3v rtc output voltage vs. load current MAX17031 toc08 load current (ma) output voltage (v) 810 246 3.2 3.1 3.3 3.4 3.5 3.0 012 no-load input supply current vs. input voltage MAX17031 toc09 input voltage (v) supply current (ma) 20 51015 1 0.1 10 100 0.01 025 skip mode i cc + i dd low-noise ultrasonic mode pwm mode typical operating characteristics (circuit of figure 1, v in = 12v, v dd = v cc = 5v, t a = +25c, unless otherwise noted.)
MAX17031 dual quick-pwm step-down controller with low- power ldo and rtc regulator for main supplies _______________________________________________________________________________________ 9 standby and shutdown input supply current vs. input voltage MAX17031 toc10 input voltage (v) supply current (ma) 20 51015 0.01 0.1 0.001 025 i cc + i dd standby (onldo = rtc, on1 = on2 = gnd) shutdown (onldo = on1 = on2 = gnd) reference offset voltage distribution MAX17031 toc11 2v offset voltage (mv) sample percentage (%) 12 -12 -4 4 50 40 70 60 20 10 30 0 -20 20 t a = +85 c t a = +25 c sample size = 150 100mv ilim threshold voltage distribution MAX17031 toc12 ilim threshold voltage (mv) sample percentage (%) 106 94 98 102 40 50 20 10 30 0 90 110 sample size = 150 t a = +85 c t a = +25 c ldo and rtc power-up MAX17031 toc13 a. input supply, 5v/div b. 5v ldo, 2v/div c. 3.3v rtc, 2v/div d. 1.0 ref, 1v/div 200 s/div 0v 0v 0v 0v 12v a 12v b 5v c 3.3v d 2.0v ldo and rtc power removal MAX17031 toc14 a. input supply, 5v/div b. 5v ldo, 2v/div c. 3.3v rtc, 2v/div d. 2.0 ref, 1v/div 200 s/div 5v 3.3v 2v 12v a 12v b 5v c 3.3v d 2.0v 5v ldo load transient MAX17031 toc15 a. ldo output, 100mv/div b. ldo current, 100ma/div 4 s/div 5v 0.1a 0a a b 5v smps startup and shutdown MAX17031 toc16 a. 5v ldo output, 0.2v/div b. 5v smps output, 2v/div c. on1, 5v/div 200 s/div 5v 5v 5v 0v 0v a 5v b 5v c c. pgood, 5v/div d. inductor current, 5a/div startup waveforms (switching regulators) MAX17031 toc17 a. on1, 5v/div b. 5v smps output, 2v/div 200 s/div 5v 5v 5v 0a 0v 0v 0v a b 5v d c skip mode c. pgood, 2v/div d. inductor current, 5a/div shutdown waveforms (switching regulators) MAX17031 toc18 a. on1, 5v/div b. 5v smps output, 2v/div 200 s/div 5v 5v 0a 0v 0v 0v a b d c typical operating characteristics (continued) (circuit of figure 1, v in = 12v, v dd = v cc = 5v, t a = +25c, unless otherwise noted.)
MAX17031 dual quick-pwm step-down controller with low- power ldo and rtc regulator for main supplies 10 ______________________________________________________________________________________ pin description typical operating characteristics (continued) (circuit of figure 1, v in = 12v, v dd = v cc = 5v, t a = +25c, unless otherwise noted.) pin name function 1 ref 2v reference voltage output. bypass ref to analog ground with a 0.22f or greater ceramic capacitor. the reference can source up to 50a for external loads. loading ref degrades output voltage accuracy according to the ref load regulation error (see typical operating characteristics ). the reference shuts down when on1, on2, and onldo are all pulled low. 2 onldo enable input for ldo5. drive onldo high ( pull up to rtc ) to enable the linear regulator (ldo5) output. drive onldo low to shut down the linear regulator output. when onldo is high, ldo5 must supply v cc and v dd . 3 v cc analog supply voltage input. connect v cc to the system supply voltage with a series 50 resistor, and bypass to analog gr ound using a 1f or greater ceramic capacitor. 4 rtc 3.3v always-on linear regulator output for rtc power. bypass rtc with a 1f or greater ceramic capacitor to analog gr ound. rtc can source up to 5ma for external loads. 5 in power input supply. bypass in with a 0.1f or greater ceramic capacitor to gnd. in powers the linear regulators (rtc and ldo5) and senses the input voltage for the quick-pwm on-time one- shot timer. the dh on-time is inversely proportional to input voltage. 6 ldo5 5v linear regulator output. bypass ldo5 with a 4.7f or greater ceramic capacitor to gnd. ldo5 can source 100ma for external load support. ldo5 is powered from in. 7 out1 output-voltage sense input for smps1 and linear regulator bypass input. out1 is an input to the quick-pwm on-time one-shot timer. out1 also serves as the feedback input for the smps1. when out1 exceeds 93.5% of the ldo5 voltage, the controller bypasses the ldo5 output to out1. the bypass switch is disabled if the out1 voltage drops by 8.5% from ldo5 nominal regulation threshold. 8 ilim1 valley current-limit adjustment for smps1. the gnd - lx1 current-limit threshold is 1/10 the voltage present on ilim1 over a 0.2v to 2v range. an internal 5a current source allows this voltage to be set with a single resistor between ilim1 and analog ground. c. inductor current, 2a/div 5v smps load transient (1a to 4a) MAX17031 toc19 a. load current, 2a/div b. 5v smps output, 100mv/div 40 s/div 4a 0a 0a 5v a b c c. inductor current, 2a/div 3.3v smps load transient (1a to 4a) MAX17031 toc20 a. load current, 2a/div b. 3.3v smps output, 100mv/div 40 s/div 4a 0a 0a 3.3v a b c c. 5v smps, 2v/div d. pgood, 5v/div power removal (smps uvlo response) MAX17031 toc21 a. input voltage, 5v/div b. 5v ldo output, 2v/div 10ms/div 12v 5v 5v 5v a 0v b 0v c 0v d 0v
MAX17031 dual quick-pwm step-down controller with low- power ldo and rtc regulator for main supplies ______________________________________________________________________________________ 11 pin description (continued) pin name function 9 pgood open-drain power-good output for smps1 and smps2. pgood is low when either output voltage is more than 15% (typ) below the nominal regulation threshold, during soft-start, in shutdown, when either smps is disabled, and after the fault latch has been tripped. after the soft-start circuit has terminated, pgood becomes high impedance if both outputs are in regulation. 10 on1 enable input for smps1. drive on1 high to enable smps1. drive on1 low to shut down smps1. 11 dh1 high-side gate-driver output for smps1. dh1 swings from lx1 to bst1. 12 lx1 inductor connection for smps1. connect lx1 to the switched side of the inductor. lx1 is the lower supply rail for the dh1 high-side gate driver. 13 bst1 boost flying capacitor connection for smps1. connect to an external capacitor as shown in figure 1. an optional resistor in series with bst1 allows the dh1 turn-on current to be adjusted. 14 dl1 low-side gate-driver output for smps1. dl1 swings from power gnd to v dd. 15 v dd supply voltage input for the dl_ gate drivers. v dd is internally connected to the drain of the hvpv bst diode switch. connect to a 5v supply, and bypass v dd to power gnd with a 1f or greater ceramic capacitor. 16 gnd analog and power ground 17 dl2 low-side gate-driver output for smps2. dl2 swings from power gnd to v dd. 18 bst2 boost flying capacitor connection for smps2. connect to an external capacitor as shown in figure 1. an optional resistor in series with bst2 allows the dh2 turn-on current to be adjusted. 19 lx2 inductor connection for smps2. connect lx2 to the switched side of the inductor. lx2 is the lower supply rail for the dh2 high-side gate driver. 20 dh2 high-side gate-driver output for smps2. dh2 swings from lx2 to bst2. 21 on2 enable input for smps2. drive on2 high to enable smps2. drive on2 low to shut down smps2. 22 skip pulse-skipping control input. this three-level input determines the operating mode for the switching regulators: high (> 2v) = pulse-skipping mode middle (1.8v) = forced-pwm mode gnd = ultrasonic mode 23 out2 output-voltage sense input for smps2. out2 is an input to the quick-pwm on-time one-shot timer. out2 also serves as the feedback input for the preset 3.3v. 24 ilim2 valley current-limit adjustment for smps2. the gnd - lx2 current-limit threshold is 1/10 the voltage present on ilim2 over a 0.2v to 2v range. an internal 5a current source allows this voltage to be set with a single resistor between ilim2 and analog ground. ep exposed pad. connect backside exposed pad to analog gnd and power gnd.
MAX17031 dual quick-pwm step-down controller with low- power ldo and rtc regulator for main supplies 12 ______________________________________________________________________________________ MAX17031 n h1 dh1 n l1 dl1 ldo5 v dd skip d1 d x1 bst1 out1 lx1 pgood rtc ref gnd in c4 0.1 f c6 0.1 f c5 10nf r4 1m ? r6 100k ? c8 0.1 f c bst1 0.1 f c1 4.7 f c out1 c in_pin 0.1 f l1 5v output 5v ldo output power ground analog ground 12v to 15v charge pump v cc ilim1 d x2 c7 10nf on1 on2 onldo ilim2 pad n h2 dh2 n l2 dl2 d2 bst2 out2 lx2 c bst2 0.1 f c out2 l2 3.3v output input (v in )* 7v to 24v combined power-good rtc supply r5 200k ? r1 47 ? c2 1.0 f r ilim1 r ilim2 c3 1 f c in 4x 10 f 25v on off * note: lower input voltages require additional input capacitance. if operating near dropout, component selection must be carefully done to ensure proper operation. figure 1. standard application circuitmain supply
detailed description the MAX17031 step-down controller is ideal for high- voltage, low-power supplies for notebook computers. maxims quick-pwm pulse-width modulator in the MAX17031 is specifically designed for handling fast load steps while maintaining a relatively constant oper- ating frequency and inductor operating point over a wide range of input voltages. the quick-pwm architec- ture circumvents the poor load-transient timing prob- lems of fixed-frequency current-mode pwms, while also avoiding the problems caused by widely varying switching frequencies in conventional constant-on-time and constant-off-time pwm schemes. figure 2 is the functional diagram overview and figure 3 is the quick- pwm core functional diagram . MAX17031 dual quick-pwm step-down controller with low- power ldo and rtc regulator for main supplies ______________________________________________________________________________________ 13 component 400khz/300khz smps1: 5v at 5a smps2: 3.3v at 8a input voltage v in = 7v to 24v input capacitor (c in ) 4x 10f, 25v taiyo yuden tmk432bj106km smps 1 output capacitor (c out1 ) 2x 100f, 6v, 35m sanyo 6tpe100mazb inductor (l1) 4.3h, 11.4m , 11a sumida cep125u high-side mosfet (n h1 ) siliconix si4800bdy 23m /30m 30v low-side mosfet (n l1 ) siliconix si4812bdy 16.5m /20m 30v current-limit resistor (r ilim1 ) 71k smps 2 output capacitor (c out2 ) 2x 150f, 4v, 35m sanyo 4tpe150mazb inductor (l2) 2.2h, 5.4m , 14a sumida cep125u high-side mosfet (n h2 ) siliconix si4684dy 9.2m /11.5m , 30v low-side mosfet (n l2 ) siliconix si4430bdy 4.8m /6.0m , 30v current-limit resistor (r ilim2 ) 71k table 1. component selection for standard applications supplier website avx corp. www.avx.com central semiconductor corp. www.centralsemi.com fairchild semiconductor www.fairchildsemi.com international rectifier www.irf.com kemet corp. www.kemet.com nec/tokin america, inc. www.nec-tokinamerica.com panasonic corp. www.panasonic.coml philips/nxp semiconductor www.semiconductors.philips.com pulse engineering www.pulseeng.com renesas technology corp. www.renesas.com sanyo electric co., ltd. www,sanyodevice.com sumida corp. www.sumida.com taiyo yuden www.t-yuden.com tdk corp. www.component.tdk.com toko america, inc. www.tokoam.com vishay (dale, siliconix) www.vishay.com wrth elektronik gmbh & co. kg www.we-online.com table 2. component suppliers
MAX17031 dual quick-pwm step-down controller with low- power ldo and rtc regulator for main supplies 14 ______________________________________________________________________________________ 2v ref dh2 bst2 lx2 dl2 dh1 bst1 lx1 dl1 pwm1 controller (figure 3) pwm2 controller (figure 3) on1 on2 ilim2 out2 ton ilim1 out1 power-good and fault protection fault1 skip ldo5 gnd ldo bypass circuitry onldo pgood v dd v dd uvlo fault2 3.3v linear regulator 5v linear regulator rtc ref v dd in byp secfb v cc fb1 select (preset 5v) v dd fb2 select (preset 3.3v) power-good and fault protection uvlo pad MAX17031 figure 2. functional diagram overview
MAX17031 dual quick-pwm step-down controller with low- power ldo and rtc regulator for main supplies ______________________________________________________________________________________ 15 gnd gnd agnd ref integrator analog soft-start/ soft-stop q trig t off(min) one-shot q trig t on one-shot on-time compute q trig ultrasonic dl driver ton in one-shot s r* *reset dominate q s r q neg current limit valley current limit zero crossing ultrasonic threshold agnd lx ilim fb refin skip v cc gnd slope comp ? fb dh driver on refin fb int preset or ext adj three-level decode figure 3. functional diagramquick-pwm core
MAX17031 the MAX17031 includes several features for multipur- pose notebook functionality, and is specifically designed for 5v/3.3v main power-supply rails. the MAX17031 includes a 100ma, 5v linear regulator (ldo5) ideal for initial power-up of the notebook and main supply. additionally, the MAX17031 includes a 3.3v, 5ma rtc supply that remains always enabled, which can be used to power the rtc supply and sys- tem pullups when the notebook shuts down. the MAX17031 also includes a skip mode control input with an accurate threshold that allows an unregulated charge pump or secondary winding to be automatically refreshedideal for generating the low-power 12v to 15v load switch supply. 3.3v rtc power the MAX17031 includes a low-current (5ma) linear reg- ulator that remains active as long as the input supply (in) exceeds 2v (typ). the main purpose of this always-enabled linear regulator is to power the rtc when all other notebook regulators are disabled. the rtc regulator sources at least 5ma for external loads. preset 5v, 100ma linear regulator the MAX17031 includes a high-current (100ma) 5v lin- ear regulator. this ldo5 is required to generate the 5v bias supply necessary to power up the switching regula- tors. once the 5v switching regulator (MAX17031 out1) is enabled, ldo5 is bypassed to out1. the MAX17031 ldo5 sources at least 100ma of supply current. bypass switch the MAX17031 includes an ldo5 bypass switch that allows the ldo5 to be bypassed to out1. when out1 exceeds 93.5% of the ldo5 output voltage for 500s, then the MAX17031 reduces the ldo5 regulation threshold and turns on an internal p-channel mosfet to short out1 to ldo5. instead of disabling the ldo5 when the MAX17031 enables the bypass switch, the controller reduces the ldo5 regulation voltage, which effectively places the linear regulator in a standby state while switched over, allowing a fast recovery if the out1 drops by 8.5% from ldo5 nominal regulation threshold. 5v bias supply (v cc /v dd ) the MAX17031 requires an external 5v bias supply (v dd and v cc ) in addition to the battery. typically, this 5v bias supply is generated by the internal 100ma ldo5 or from the notebooks 95%-efficient 5v main supply. keeping these bias supply inputs independent improves the overall efficiency. when onldo is enabled, v dd and v cc must be supplied from ldo5. the v dd bias supply input powers the internal gate dri- vers and the v cc bias supply input powers the analog control blocks. the maximum current required is domi- nated by the switching losses of the drivers and can be estimated as follows: i bias(max) = i cc(max) + f sw q g 30ma to 60ma (typ) free-running constant-on-time pwm controller with input feed-forward the quick-pwm control architecture is a pseudo-fixed- frequency, constant on-time, current-mode regulator with voltage feed-forward. this architecture relies on the output filter capacitors esr to act as a current- sense resistor, so the feedback ripple voltage provides the pwm ramp signal. the control algorithm is simple: the high-side switch on-time is determined solely by a one-shot whose pulse width is inversely proportional to input voltage and directly proportional to output volt- age. another one-shot sets a minimum off-time (400ns typ). the on-time one-shot is triggered if the error com- parator is low, the low-side switch current is below the valley current-limit threshold, and the minimum off-time one-shot has timed out. on-time one-shot the heart of the pwm core is the one-shot that sets the high-side switch on-time. this fast, low-jitter, adjustable one-shot includes circuitry that varies the on-time in response to battery and output voltage. the high-side switch on-time is inversely proportional to the battery voltage as sensed by in, and proportional to the feed- back voltage: where k (switching period) is set 2.5s for side 1 and 3.3s for side 2. for continuous conduction operation, the actual switching frequency can be estimated by: where v drop1 is the sum of the parasitic voltage drops in the inductor discharge path, including synchronous rectifier, inductor, and pcb resistances; v drop2 is the sum of the parasitic voltage drops in the charging path, including the high-side switch, inductor, and pcb resis- tances; and t on is the on-time calculated by the MAX17031. f vv tvv v sw out drop on in drop drop = + () + () ? 1 12 t kv v on out in = dual quick-pwm step-down controller with low- power ldo and rtc regulator for main supplies 16 ______________________________________________________________________________________
modes of operation forced-pwm mode (v skip = 1.8v) the low-noise forced-pwm mode (v skip = 1.8v) dis- ables the zero-crossing comparator, which controls the low-side switch on-time. this forces the low-side gate- drive waveform to constantly be the complement of the high-side gate-drive waveform, so the inductor current reverses at light loads while dh maintains a duty factor of v out /v in . the benefit of forced-pwm mode is to keep the switching frequency fairly constant. however, forced-pwm operation comes at a cost: the no-load 5v bias current remains between 20ma to 60ma depend- ing on the switching frequency and mosfet selection. the MAX17031 automatically uses forced-pwm operation during shutdown regardless of the skip configuration. automatic pulse-skipping mode (v skip > 2v) in skip mode (v skip > 2v), an inherent automatic switchover to pfm takes place at light loads. this switchover is affected by a comparator that truncates the low-side switch on-time at the inductor currents zero crossing. the zero-crossing comparator output is set by the differential voltage across lx and gnd. dc output-accuracy specifications refer to the integrated threshold of the error comparator. when the inductor is in continuous conduction, the MAX17031 regulates the valley of the output ripple and the internal integrator removes the actual dc output-voltage error caused by the output-ripple voltage and internal slope compensa- tion. in discontinuous conduction (v skip > 2v and i out < i load(skip) ), the integrator cannot correct for the low- frequency output ripple error, so the output voltage has a dc regulation level higher than the error comparator threshold by approximately 1.5% due to slope compen- sation and output ripple voltage. ultrasonic mode (v skip = gnd) shorting skip to ground activates a unique pulse- skipping mode with a guaranteed minimum switching frequency of 20khz. this ultrasonic pulse-skipping mode eliminates audio-frequency modulation that would otherwise be present when a lightly loaded controller automatically skips pulses. in ultrasonic mode, the con- troller automatically transitions to fixed-frequency pwm operation when the load reaches the same critical con- duction point (i load(skip) ) that occurs when normally pulse skipping. an ultrasonic pulse occurs (figure 4) when the con- troller detects that no switching has occurred within the last 37s. once triggered, the ultrasonic circuitry pulls dl high, turning on the low-side mosfet to induce a negative inductor current. after the inductor current reaches the negative ultrasonic current threshold, the controller turns off the low-side mosfet (dl pulled low) and triggers a constant on-time (dh driven high). when the on-time has expired, the controller reenables the low-side mosfet until the inductor current drops below the zero-crossing threshold. starting with a dl pulse greatly reduces the peak output voltage when compared to starting with a dh pulse. the output voltage at the beginning of the ultrasonic pulse determines the negative ultrasonic current thresh- old, corresponding to: where r cs is the current-sense resistance seen across lx to gnd. vir neg us l c s () = MAX17031 dual quick-pwm step-down controller with low- power ldo and rtc regulator for main supplies ______________________________________________________________________________________ 17 on-time (t on ) i sonic 0 inductor current zero-crossing detection 40 s (max) figure 4. ultrasonic waveforms
MAX17031 secondary feedback (skip) when the controller skips pulses (v skip > 2v), the long time between pulses (especially if the output is sinking current) allows the external charge-pump voltage or transformer secondary winding voltage to drop. connecting a resistor-divider between the secondary output to skip to ground sets up a minimum refresh threshold. when the skip voltage drops below its 2v threshold, the MAX17031 enters forced-pwm mode. this forces the controller to begin switching, allowing the external unregulated charge pump (or transformer secondary winding) to be refreshed. valley current-limit protection the current-limit circuit employs a unique valley cur- rent-sensing algorithm that senses the inductor current through the low-side mosfetacross lx to analog gnd. if the current through the low-side mosfet exceeds the valley current-limit threshold, the pwm controller is not allowed to initiate a new cycle. the actual peak current is greater than the valley current- limit threshold by an amount equal to the inductor ripple current. therefore, the exact current-limit characteristic and maximum load capability are a function of the inductor value and battery voltage. when combined with the undervoltage protection circuit, this current- limit method is effective in almost every circumstance. in forced-pwm mode, the MAX17031 also implements a negative current limit to prevent excessive reverse inductor currents when v out is sinking current. the negative current-limit threshold is set to approximately 120% of the positive current limit. por, uvlo when v cc rises above the power-on reset (por) thresh- old, the MAX17031 clears the fault latches, forces the low-side mosfet to turn on (dl high), and resets the soft-start circuit, preparing the controller for power-up. however, the v cc undervoltage lockout (uvlo) circuitry inhibits switching until v cc reaches 4.2v (typ). when v cc rises above 4.2v and the controller has been enabled (on_ pulled high), the controller activates the enabled pwm controllers and initializes soft-start. when v cc drops below the uvlo threshold (falling edge), the controller stops switching, and dh and dl are pulled low. when the 2v por falling-edge threshold is reached, the dl state no longer matters since there is not enough voltage to force the switching mosfets into a low on-resistance state, so the controller pulls dl high, allowing a soft discharge of the output capacitors (damped response). however, if the v cc recovers before reaching the falling por threshold, dl remains low until the error comparator has been properly pow- ered up and triggers an on-time. soft-start and soft-shutdown the MAX17031 includes voltage soft-start and soft- shutdownslowly ramping up and down the target volt- age. during startup, the slew-rate control softly slews the target voltage over a 1ms startup period. this long startup period reduces the inrush current during startup. when on1 or on2 is pulled low or the output undervolt- age fault latch is set, the respective output automatically enters soft-shutdown; the regulator enters pwm mode and ramps down its output voltage over a 1ms period. after the output voltage drops below 0.1v, the MAX17031 pulls dl high, clamping the output and lx switching node to ground, preventing leakage currents from pulling up the output and minimizing the negative output voltage undershoot during shutdown. output voltage dc output-accuracy specifications in the electrical characteristics table refer to the error comparators threshold. when the inductor continuously conducts, the MAX17031 regulates the valley of the output ripple, so the actual dc output voltage is lower than the slope-compen- sated trip level by 50% of the output ripple voltage. for pwm operation (continuous conduction), the output volt- age is accurately defined by the following equation: where v nom is the nominal feedback voltage, a ccv is the integrators gain, and v ripple is the output ripple voltage (v ripple = esr x ? i inductor , as described in the output capacitor selection section). in discontinuous conduction (i out < i load(skip) ), the longer off-times allow the slope compensation to increase the threshold voltage by as much as 1%, so the output voltage regulates slightly higher than it would in pwm operation. internal integrator the internal integrator improves the output accuracy by removing any output accuracy errors caused by the slope compensation, output ripple voltage, and error- amplifier offset. therefore, the dc accuracy (in forced- pwm mode) depends on the integrators gain, the inte- grators offset, and the accuracy of the integrators ref- erence input. vv v a out pwm nom ripple ccv () =+ ? ? ? ? ? ? 2 dual quick-pwm step-down controller with low- power ldo and rtc regulator for main supplies 18 ______________________________________________________________________________________
power-good outputs (pgood) and fault protection pgood is the open-drain output that continuously monitors both output voltages for undervoltage and overvoltage conditions. pgood is actively held low in shutdown (on1 or on2 = gnd), during soft-start, and soft-shutdown. approximately 20s (typ) after the soft- start terminates, pgood becomes high impedance as long as both output voltages exceed 85% of the nomi- nal fixed-regulation voltage. pgood goes low if the output voltage drops 15% below the regulation voltage, or if the smps controller is shut down. for a logic-level pgood output voltage, connect an external pullup resistor between pgood and the logic power supply. a 100k ? pullup resistor works well in most applications. overvoltage protection (ovp) when the output voltage rises 15% above the fixed- regulation voltage, the controller immediately pulls pgood low, sets the overvoltage fault latch, and imme- diately pulls the respective dl_ highclamping the output fault to gnd. toggle either on1 or on2 input, or cycle v cc power below its por threshold to clear the fault latch and restart the controller. undervoltage protection (uvp) when the output voltage drops 30% below the fixed- regulation voltage, the controller immediately pulls the pgood low, sets the undervoltage fault latch, and begins the shutdown sequence. after the output volt- age drops below 0.1v, the synchronous rectifier turns on, clamping the output to gnd regardless of the out- put voltage. toggle either on1 or on2 input, or cycle v cc power below its por threshold to clear the fault latch and restart the controller. thermal-fault protection (t shdn ) the MAX17031 features a thermal-fault protection cir- cuit. when the junction temperature rises above +160c, a thermal sensor activates the fault latch, pulls pgood low, enables the 10 ? discharge circuit, and disables the controllerdh and dl pulled low. toggle onldo or cycle in power to reactivate the controller after the junction temperature cools by 15c. design procedure firmly establish the input-voltage range and maximum load current before choosing an inductor operating point (ripple-current ratio). the primary design goal is choosing a good inductor operating point, and the fol- lowing three factors dictate the rest of the design: ? input voltage range: the maximum value (v in(max) ) must accommodate the worst-case, high ac- adapter voltage. the minimum value (v in(min) ) must account for the lowest battery voltage after drops due to connectors, fuses, and battery-selec- tor switches. if there is a choice at all, lower input voltages result in better efficiency. ? maximum load current: there are two values to consider. the peak load current (i load(max) ) deter- mines the instantaneous component stresses and fil- tering requirements and thus drives output capacitor selection, inductor saturation rating, and the design of the current-limit circuit. the continuous load current (i load ) determines the thermal stresses and thus dri- ves the selection of input capacitors, mosfets, and other critical heat-contributing components. MAX17031 dual quick-pwm step-down controller with low- power ldo and rtc regulator for main supplies ______________________________________________________________________________________ 19 mode controller state driver state shutdown (on_ = high to low) output uvp (latched) voltage soft-shutdown initiated. internal error-amplifier target slowly ramped down to gnd and output actively discharged (automatically enters forced-pwm mode). dl driven high and dh pulled low after soft-shutdown completed (output < 0.1v). output ovp (latched) controller shuts down and ea target internally slewed down. controller remains off until on_ toggled or v cc power cycled. dl immediately driven high, dh pulled low. uvlo (v cc falling-edge) thermal fault (latched) smps controller disabled (assuming on_ pulled high), 10 output discharge active. dl and dh pulled low. uvlo (v cc rising edge) smps controller disabled (assuming on_ pulled high), 10 output discharge active. dl driven high, dh pulled low. v cc below por smps inactive, 10 output discharge active. dl driven high, dh pulled low. table 3. fault protection and shutdown operation table
MAX17031 inductor operating point: this choice provides trade-offs between size vs. efficiency and transient response vs. output ripple. low inductor values pro- vide better transient response and smaller physical size, but also result in lower efficiency and higher output ripple due to increased ripple currents. the minimum practical inductor value is one that causes the circuit to operate at the edge of critical conduc- tion (where the inductor current just touches zero with every cycle at maximum load). inductor values lower than this grant no further size-reduction bene- fit. the optimum operating point is usually found between 20% and 50% value at which pfm/pwm switchover occurs. inductor selection the switching frequency and inductor operating point determine the inductor value as follows: for example: i load(max) = 4a, v in = 12v, v out2 = 2.5v, f sw = 355khz, 30% ripple current or lir = 0.3: find a low-loss inductor having the lowest possible dc resistance that fits in the allotted dimensions. ferrite cores are often the best choice, although powdered iron is inexpensive and can work well at 200khz. the core must be large enough not to saturate at the peak inductor current (i peak ): most inductor manufacturers provide inductors in stan- dard values, such as 1.0h, 1.5h, 2.2h, 3.3h, etc. also look for nonstandard values, which can provide a better compromise in lir across the input voltage range. if using a swinging inductor (where the no-load inductance decreases linearly with increasing current), evaluate the lir with properly scaled inductance values. transient response the inductor ripple current also impacts transient- response performance, especially at low v in - v out dif- ferentials. low inductor values allow the inductor current to slew faster, replenishing charge removed from the output filter capacitors by a sudden load step. the amount of output sag is also a function of the maxi- mum duty factor, which can be calculated from the on- time and minimum off-time: where t off(min) is the minimum off-time (see the electrical characteristics table). the amount of overshoot during a full-load to no-load tran- sient due to stored inductor energy can be calculated as: setting the current limit the minimum current-limit threshold must be great enough to support the maximum load current when the current limit is at the minimum tolerance value. the val- ley of the inductor current occurs at i load(max) minus half the ripple current; therefore: where i lim(val) equals the minimum valley current-limit threshold voltage divided by the current-sense resis- tance (r sense ). when using a 100k ? ilim resistor, the minimum valley current-limit threshold is 40mv. connect a resistor between ilim_ and analog ground to set the adjustable current-limit threshold. the valley current-limit threshold is approximately 1/10 the ilim voltage formed by the external resistance and internal 5a current source. the 40k ? to 400k ? adjustment range corresponds to a 20mv to 200mv valley current- limit threshold. when adjusting the current limit, use 1% tolerance resistors to prevent significant inaccuracy in the valley current-limit tolerance. output capacitor selection the output filter capacitor must have low enough equiv- alent series resistance (esr) to meet output ripple and load-transient requirements, yet have high enough esr to satisfy stability requirements. for processor core voltage converters and other appli- cations where the output is subject to violent load tran- sients, the output capacitors size depends on how much esr is needed to prevent the output from dipping too low under a load transient. ignoring the sag due to finite capacitance: ii ilir lim val load max load max () ( ) () >? ? ? ? ? ? ? 2 v il cv soar load max out out () ? () 2 2 v li vk v t sag load max out in off min = () ? ? ? ? ? ? + ? () ( 2 ) ) ( ? ? ? ? ? ? ? () ? ? ? ? ? ? ? 2c v vv k v t out out in out in off m min) ? ? ? ? ? ? ? ? ii lir peak load max =+ ? ? ? ? ? ? () 1 2 l vvv vkhza h = ? () = 25 12 25 12 355 4 0 3 465 .. . . l vvv vf i lir out in out in sw load max = ? () () dual quick-pwm step-down controller with low- power ldo and rtc regulator for main supplies 20 ______________________________________________________________________________________
in applications without large and fast load transients, the output capacitors size often depends on how much esr is needed to maintain an acceptable level of out- put voltage ripple. the output ripple voltage of a step- down controller equals the total inductor ripple current multiplied by the output capacitors esr. therefore, the maximum esr required to meet ripple specifications is: the actual capacitance value required relates to the physical size needed to achieve low esr, as well as to the chemistry of the capacitor technology. thus, the capacitor is usually selected by esr and voltage rating rather than by capacitance value (this is true of tanta- lums, os-cons, polymers, and other electrolytics). when using low-capacity filter capacitors, such as ceramic capacitors, size is usually determined by the capacity needed to prevent v sag and v soar from causing problems during load transients. generally, once enough capacitance is added to meet the over- shoot requirement, undershoot at the rising load edge is no longer a problem (see the v sag and v soar equa- tions in the transient response section). however, low- capacity filter capacitors typically have high esr zeros that might affect the overall stability (see the output capacitor stability considerations section). output capacitor stability considerations for quick-pwm controllers, stability is determined by the value of the esr zero relative to the switching fre- quency. the boundary of instability is given by the fol- lowing equation: where: for a typical 300khz application, the esr zero frequency must be well below 95khz, preferably below 50khz. tantalum and os-con capacitors in widespread use at the time of publication have typical esr zero frequen- cies of 25khz. in the design example used for inductor selection, the esr needed to support 25mv p-p ripple is 25mv/1.2a = 20.8m ? . one 220f/4v sanyo polymer (tpe) capacitor provides 15m ? (max) esr. this results in a zero at 48khz, well within the bounds of stability. do not put high-value ceramic capacitors directly on out1 and out2 pins to ensure stability. large ceramic capacitors can have a high-esr zero frequency and cause erratic, unstable operation. however, it is easy to add enough series resistance by placing the capacitors a couple of inches downstream from the feedback sense point, which should be as close as possible to the inductor. unstable operation manifests itself in two related but distinctly different ways: double-pulsing and fast-feed- back loop instability. double-pulsing occurs due to noise on the output or because the esr is so low that there is not enough voltage ramp in the output-voltage signal. this fools the error comparator into triggering a new cycle immediately after the 400ns minimum off- time period has expired. double-pulsing is more annoy- ing than harmful, resulting in nothing worse than increased output ripple. however, it can indicate the possible presence of loop instability due to insufficient esr. loop instability results in oscillations at the output after line or load steps. such perturbations are usually damped, but can cause the output voltage to rise above or fall below the tolerance limits. the easiest method for checking stability is to apply a very fast zero-to-max load transient and carefully observe the output-voltage ripple envelope for over- shoot and ringing. it can help to simultaneously monitor the inductor current with an ac current probe. do not allow more than one cycle of ringing after the initial step-response under/overshoot. input capacitor selection the input capacitor must meet the ripple current requirement (i rms ) imposed by the switching currents: for most applications, nontantalum chemistries (ceram- ic, aluminum, or os-con) are preferred due to their resistance to power-up surge currents typical of sys- tems with a mechanical switch or connector in series with the input. if the MAX17031 is operated as the sec- ond stage of a two-stage power conversion system, tantalum input capacitors are acceptable. in either con- figuration, choose a capacitor that has less than 10c temperature rise at the rms input current for optimal reliability and lifetime. ii vvv v rms load out in out in = ? () ? ? ? ? ? ? ? ? f rc esr esr out = 1 2 f f esr sw r v ilir esr ripple load max () r v i esr step load max ? () MAX17031 dual quick-pwm step-down controller with low- power ldo and rtc regulator for main supplies ______________________________________________________________________________________ 21
MAX17031 power-mosfet selection most of the following mosfet guidelines focus on the challenge of obtaining high load-current capability when using high-voltage (> 20v) ac adapters. low- current applications usually require less attention. the high-side mosfet (n h ) must be able to dissipate the resistive losses plus the switching losses at both v in(min) and v in(max) . ideally, the losses at v in(min) should be roughly equal to the losses at v in(max) , with lower losses in between. if the losses at v in(min) are significantly higher, consider increasing the size of n h . conversely, if the losses at v in(max) are significantly higher, consider reducing the size of n h . if v in does not vary over a wide range, maximum efficiency is achieved by selecting a high-side mosfet (n h ) that has conduction losses equal to the switching losses. choose a low-side mosfet (n l ) that has the lowest possible on-resistance (r ds(on) ), comes in a moder- ate-sized package (i.e., 8-pin so, dpak, or d 2 pak), and is reasonably priced. ensure that the MAX17031 dl_ gate driver can supply sufficient current to support the gate charge and the current injected into the para- sitic drain-to-gate capacitor caused by the high-side mosfet turning on; otherwise, cross-conduction prob- lems could occur. switching losses are not an issue for the low-side mosfet since it is a zero-voltage switched device when used in the step-down topology. power-mosfet dissipation worst-case conduction losses occur at the duty factor extremes. for the high-side mosfet (n h ), the worst- case power dissipation due to resistance occurs at minimum input voltage: generally, use a small high-side mosfet to reduce switching losses at high input voltages. however, the r ds(on) required to stay within package power-dissi- pation limits often limits how small the mosfet can be. the optimum occurs when the switching losses equal the conduction (r ds(on) ) losses. high-side switching losses do not become an issue until the input is greater than approximately 15v. calculating the power dissipation in high-side mosfets (n h ) due to switching losses is difficult, since it must allow for difficult-to-quantify factors that influ- ence the turn-on and turn-off times. these factors include the internal gate resistance, gate charge, threshold voltage, source inductance, and pcb layout characteristics. the following switching loss calculation provides only a very rough estimate and is no substitute for breadboard evaluation, preferably including verifica- tion using a thermocouple mounted on n h : where c oss is the high-side mosfets output capaci- tance, q g(sw) is the charge needed to turn on the high- side mosfet, and i gate is the peak gate-drive source/sink current (1a typ). switching losses in the high-side mosfet can become a heat problem when maximum ac adapter voltages are applied due to the squared term in the switching- loss equation provided above. if the high-side mosfet chosen for adequate r ds(on) at low battery voltages becomes extraordinarily hot when subjected to v in(max) , consider choosing another mosfet with lower parasitic capacitance. for the low-side mosfet (n l ), the worst-case power dissipation always occurs at maximum battery voltage: the absolute worst case for mosfet power dissipation occurs under heavy overload conditions that are greater than i load(max) but are not high enough to exceed the current limit and cause the fault latch to trip. to protect against this possibility, overdesign the cir- cuit to tolerate: where i valley(max) is the maximum valley current allowed by the current-limit circuit, including threshold tolerance and sense-resistance variation. the mosfets must have a relatively large heatsink to han- dle the overload power dissipation. choose a schottky diode (d l ) with a forward voltage drop low enough to prevent the low-side mosfets body diode from turning on during the dead time. as a general rule, select a diode with a dc current rating equal to 1/3 the load current. this diode is optional and can be removed if efficiency is not critical. ii ilir load valley max load max =+ ? ? ? ? ? ? () () 2 pd (nl resistive) = 1 ? ? ? ? ? ? ? ? ? ? v v out in max () ? ? ? ? ? ? () ir load ds on 2 () pd (nh switching) = vifq i in max load sw g sw () () g gate i v ? ? ? ? ? ? + n n oss sw cf 2 2 ? ? ? ? ? ? pd (nh resistive) = v v ir out in load d ? ? ? ? ? ? () 2 s son () dual quick-pwm step-down controller with low- power ldo and rtc regulator for main supplies 22 ______________________________________________________________________________________
applications information step-down converter dropout performance the output voltage-adjustable range for continuous- conduction operation is restricted by the nonadjustable minimum off-time one-shot. when working with low input voltages, the duty-factor limit must be calculated using worst-case values for on- and off-times. manufacturing tolerances and internal propagation delays introduce an error to the ton k-factor. this error is greater at higher frequencies. also, keep in mind that transient response performance of buck regulators operated too close to dropout is poor, and bulk output capacitance must often be added (see the v sag equa- tion in the design procedure section). the absolute point of dropout is when the inductor cur- rent ramps down during the minimum off-time ( ? i down ) as much as it ramps up during the on-time ( ? i up ). the ratio h = ? i up / ? i down indicates the controllers ability to slew the inductor current higher in response to increased load, and must always be greater than 1. as h approaches 1, the absolute minimum dropout point, the inductor current cannot increase as much during each switching cycle, and v sag greatly increases unless additional output capacitance is used. a reasonable minimum value for h is 1.5, but adjusting this up or down allows trade-offs between v sag , output capacitance, and minimum operating voltage. for a given value of h, the minimum operating voltage can be calculated as: where v drop2 is the parasitic voltage drop in the charge path (see the on-time one-shot section), t off(min) is from the electrical characteristics table, and k (1/f sw ) is the switching period. the absolute min- imum input voltage is calculated with h = 1. if the calculated v in(min) is greater than the required mini- mum input voltage, then operating frequency must be reduced or output capacitance added to obtain an acceptable v sag . if operation near dropout is anticipated, calculate v sag to be sure of adequate transient response. dropout design example: v out2 = 2.5v f sw = 355khz k = 3.0s, worst-case k min = 3.3s t off(min) = 500ns v drop2 = 100mv h = 1.5: calculating again with h = 1 and the typical k-factor value (k = 3.3s) gives the absolute limit of dropout: therefore, v in must be greater than 3.06v, even with very large output capacitance, and a practical input volt- age with reasonable output capacitance would be 3.47v. pcb layout guidelines careful pcb layout is critical to achieving low switching losses and clean, stable operation. the switching power stage requires particular attention. if possible, mount all the power components on the top side of the board, with their ground terminals flush against one another. follow these guidelines for good pcb layout: ? keep the high-current paths short, especially at the ground terminals. this practice is essential for sta- ble, jitter-free operation. ? keep the power traces and load connections short. this practice is essential for high efficiency. using thick copper pcbs (2oz vs. 1oz) can enhance full- load efficiency by 1% or more. correctly routing pcb traces is a difficult task that must be approached in terms of fractions of centimeters, where a single milliohm of excess trace resistance causes a measurable efficiency penalty. ? minimize current-sensing errors by connecting lx_ directly to the drain of the low-side mosfet. ? when trade-offs in trace lengths must be made, it is preferable to allow the inductor charging path to be made longer than the discharge path. for example, it is better to allow some extra distance between the input capacitors and the high-side mosfet than to allow distance between the inductor and the low- side mosfet or between the inductor and the out- put filter capacitor. ? route high-speed switching nodes (bst_, lx_, dh_, and dl_) away from sensitive analog areas (ref, and out_). a sample layout is available in the MAX17031 evaluation kit data sheet. v= =3. in(min) 25 01 1 1 500 33 .. . vv ns s + ? ? ? ? ? ? ? 0 06v v= = in(min) 25 01 1 1 5 500 30 .. . . vv ns s + ? ? ? ? ? ? ? 3 3.47v v vv ht k in min out drop off min () () = + ? ? ? ? ? ? ? 2 1 MAX17031 dual quick-pwm step-down controller with low- power ldo and rtc regulator for main supplies ______________________________________________________________________________________ 23
MAX17031 dual quick-pwm step-down controller with low- power ldo and rtc regulator for main supplies maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a maxim product. no circu it patent licenses are implied. maxim reserves the right to change the circuitry and specifications without notice at any time. 24 ____________________maxim integrated products, 120 san gabriel drive, sunnyvale, ca 94086 408-737-7600 ? 2008 maxim integrated products is a registered trademark of maxim integrated products, inc. layout procedure 1) place the power components first, with ground ter- minals adjacent (n l_ source, c in , c out_ , and d l_ anode). if possible, make all these connections on the top layer with wide, copper-filled areas. 2) mount the controller ic adjacent to the low-side mosfet, preferably on the back side opposite n l_ and n h_ in order to keep lx_, gnd, dh_, and the dl_ gate-drive lines short and wide. the dl_ and dh_ gate traces must be short and wide (50 mils to 100 mils wide if the mosfet is 1in from the con- troller ic) to keep the driver impedance low and for proper adaptive dead-time sensing. 3) group the gate-drive components (bst_ capacitor, v dd bypass capacitor) together near the controller ic. 4) make the dc-dc controller ground connections as shown in figure 1. this diagram can be viewed as having two separate ground planes: power ground, where all the high-power components go; and an ana- log ground plane for sensitive analog components. the analog ground plane and power ground plane must meet only at a single point directly at the ic. 5) connect the output power planes directly to the out- put filter capacitor positive and negative terminals with multiple vias. place the entire dc-dc converter circuit as close to the load as is practical. package information for the latest package outline information and land patterns, go to www.maxim-ic.com/packages . package type package code document no. 24 tqfn t2444-3 21-0139 chip information transistor count: 12,197 process: bicmos

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